diff options
| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-04-27 18:26:43 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-04-27 18:26:43 +0000 |
| commit | 932257869f0bf037a3ad5f728bbc9650cc34dd1d (patch) | |
| tree | dfb61074685b3e6d86845a126c7b4706e95cc401 /src/cpu/via/car | |
| parent | bc9de2f1e2b9582f0bd692ef3b8f3cc98d32bfb5 (diff) | |
| download | coreboot-932257869f0bf037a3ad5f728bbc9650cc34dd1d.tar.xz | |
Create a valid stack pointer after leaving CAR, so function calls don't
reset the machine in the small window between CAR and coreboot_ram.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/via/car')
| -rw-r--r-- | src/cpu/via/car/cache_as_ram_post.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/cpu/via/car/cache_as_ram_post.c b/src/cpu/via/car/cache_as_ram_post.c index 99e0dd89ec..9058727bc6 100644 --- a/src/cpu/via/car/cache_as_ram_post.c +++ b/src/cpu/via/car/cache_as_ram_post.c @@ -99,8 +99,11 @@ and in x86_setup_fixed_mtrrs()(mtrr.c), 0-256M is set cacheable.*/ "movl %eax, %cr0\n\t" "invd\n\t" - /* - FIXME: I hope we don't need to change esp and ebp value here, so we can restore value from mmx sse back - But the problem is the range is some io related, So don't go back - */ + /* FIXME: These values might have to change for suspend-to-ram. + the 0x00400000 was chosen as this is a place in memory that + should exist in all contemporary configurations (ie. large + enough RAM), but doesn't collide with anything coreboot does. + Other than that, it's arbitrary. */ + "movl $0x00400000,%esp\n\t" + "movl %esp,%ebp\n\t" ); |