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authorUwe Hermann <uwe@hermann-uwe.de>2010-10-01 21:46:04 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-10-01 21:46:04 +0000
commitdd8367006cf1a400384ff7076379bb53c6abea8a (patch)
tree9e6b74a79611549266680071d3fa72558063d5f5 /src/cpu/via/car
parent2ba2b553b5ec01dced1ebadfa086c926f441f754 (diff)
downloadcoreboot-dd8367006cf1a400384ff7076379bb53c6abea8a.tar.xz
Factor out common CAR asm snippets.
This makes the CAR implementations a lot more readable, shorter and easier to follow, and also reduces the amount of uselessly duplicated code. For example there are more than 12 open-coded "enable cache" instances spread all over the place (and 12 "disable cache" ones), multiple "enable mtrr", "save BIST", "restore BIST", etc. etc. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5902 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/via/car')
-rw-r--r--src/cpu/via/car/cache_as_ram.inc27
1 files changed, 7 insertions, 20 deletions
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index 6bd2c0f393..be00fe30dc 100644
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -25,21 +25,18 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <cpu/x86/car.h>
#include <cpu/x86/stack.h>
#include <cpu/x86/mtrr.h>
#define CacheSize CONFIG_DCACHE_RAM_SIZE
#define CacheBase CONFIG_DCACHE_RAM_BASE
- /* Save the BIST result. */
- movl %eax, %ebp
+ save_bist_result()
CacheAsRam:
- /* Disable cache. */
- movl %cr0, %eax
- orl $(1 << 30), %eax
- movl %eax, %cr0
+ disable_cache()
invd
/* Set the default memory type and enable fixed and variable MTRRs. */
@@ -116,10 +113,7 @@ clear_fixed_var_mtrr_out:
movl $(MTRRdefTypeEn), %eax
wrmsr
- /* Enable cache. */
- movl %cr0, %eax
- andl $(~((1 << 30) | (1 << 29))), %eax
- movl %eax, %cr0
+ enable_cache()
/* Read the range with lodsl. */
cld
@@ -175,8 +169,7 @@ testok:
jne stackerr
#endif
- /* Restore the BIST result. */
- movl %ebp, %eax
+ restore_bist_result()
/* We need to set EBP? No need. */
movl %esp, %ebp
@@ -191,10 +184,7 @@ testok:
/* We don't need CAR from now on. */
- /* Disable cache. */
- movl %cr0, %eax
- orl $(1 << 30), %eax
- movl %eax, %cr0
+ disable_cache()
/* Set the default memory type and enable variable MTRRs. */
/* TODO: Or also enable fixed MTRRs? Bug in the code? */
@@ -253,10 +243,7 @@ testok:
movl $(~(CONFIG_XIP_ROM_SIZE - 1) | 0x800), %eax
wrmsr
- /* Enable cache. */
- movl %cr0, %eax
- andl $(~((1 << 30) | (1 << 29))), %eax
- movl %eax, %cr0
+ enable_cache()
invd
/* Clear boot_complete flag. */