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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-19 15:40:52 +0100 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-20 18:32:13 +0000 |
commit | 4c38ed3c38ac5ef0136bf5d5c893d8b71d82b531 (patch) | |
tree | 4d0c090a36412c40720ea957b6d568e4c7ba5886 /src/cpu/via/nano/Kconfig | |
parent | fbc59ffb64579fa161decd6ab82d50f67877f3a0 (diff) | |
download | coreboot-4c38ed3c38ac5ef0136bf5d5c893d8b71d82b531.tar.xz |
cpu/via/nano: Drop support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.
Change-Id: I6d9771e97619c3775f8325daf4b8453cd51d6571
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/via/nano/Kconfig')
-rw-r--r-- | src/cpu/via/nano/Kconfig | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig deleted file mode 100644 index 14acfd5662..0000000000 --- a/src/cpu/via/nano/Kconfig +++ /dev/null @@ -1,42 +0,0 @@ -## -## This file is part of the coreboot project. -## -## This program is free software: you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation, either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -config CPU_VIA_NANO - bool - -if CPU_VIA_NANO - -config CPU_SPECIFIC_OPTIONS - def_bool y - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select UDELAY_TSC - select TSC_MONOTONIC_TIMER - select UNKNOWN_TSC_RATE - select MMX - select SSE2 - select SUPPORT_CPU_UCODE_IN_CBFS - select CAR_GLOBAL_MIGRATION - -config DCACHE_RAM_BASE - hex - default 0xffe00000 - -config DCACHE_RAM_SIZE - hex - default 0x8000 - -endif # CPU_VIA_NANO |