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authorPatrick Georgi <patrick@georgi-clan.de>2012-03-16 19:28:15 +0100
committerPatrick Georgi <patrick@georgi-clan.de>2012-03-16 20:40:47 +0100
commitd4d5e4d3e10da06a83d57a147bd58a733381de18 (patch)
tree521b13c4eb4b983f6717f9fb05cb08d7f8d177dc /src/cpu/via
parent35e1c861f59696e2ff545e89709e5e72ccc79fca (diff)
downloadcoreboot-d4d5e4d3e10da06a83d57a147bd58a733381de18.tar.xz
Via Epia-N and C3: Set ioapic delivery type in Kconfig
The original comment says it's a Via C3 and not Epia requirement to deliver IOAPIC interrupts on APIC serial bus. Change-Id: I73c55755e0ec1ac5756b4ee7ccdfc8eb93184e4f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/435 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/via')
-rw-r--r--src/cpu/via/c3/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/via/c3/Kconfig b/src/cpu/via/c3/Kconfig
index a5b4f22673..259a1f211d 100644
--- a/src/cpu/via/c3/Kconfig
+++ b/src/cpu/via/c3/Kconfig
@@ -7,5 +7,6 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select UDELAY_TSC
select MMX
+ select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
endif # CPU_VIA_C3