diff options
| author | Eric Biederman <ebiederm@xmission.com> | 2004-10-14 19:29:29 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2004-10-14 19:29:29 +0000 |
| commit | fcd5ace00b333ce31b11b02a2243dfbf39307f10 (patch) | |
| tree | d686d752ccea9b185b0008c70d8523749b26e2dd /src/cpu/x86/16bit/reset16.inc | |
| parent | 98e619b1cefcb9871185f4cc3db85fa430dcdbce (diff) | |
| download | coreboot-fcd5ace00b333ce31b11b02a2243dfbf39307f10.tar.xz | |
- Add new cvs code to cvs
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/16bit/reset16.inc')
| -rw-r--r-- | src/cpu/x86/16bit/reset16.inc | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/cpu/x86/16bit/reset16.inc b/src/cpu/x86/16bit/reset16.inc new file mode 100644 index 0000000000..d36c94085e --- /dev/null +++ b/src/cpu/x86/16bit/reset16.inc @@ -0,0 +1,21 @@ + .section ".reset" + .code16 +.globl reset_vector +reset_vector: +#if _ROMBASE >= 0xffff0000 + /* jmp _start */ + .byte 0xe9 + .int _start - ( . + 2 ) + /* Note: The above jump is hand coded to work around bugs in binutils. + * 5 byte are used for a 3 byte instruction. This works because x86 + * is little endian and allows us to use supported 32bit relocations + * instead of the weird 16 bit relocations that binutils does not + * handle consistenly between versions because they are used so rarely. + */ +#else +# error _ROMBASE is an unsupported value +#endif + . = 0x8; + .code32 + jmp protected_start + .previous |