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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-21 10:12:15 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-23 15:43:58 +0200 |
| commit | d6e96864c9245b82222dada6fea2b89ccb7fecfd (patch) | |
| tree | 9d850d9cfc15d19792da114d426009cc6fb208fa /src/cpu/x86/16bit | |
| parent | 38424987c6d19015e4572d5371a0f9f621fc46fa (diff) | |
| download | coreboot-d6e96864c9245b82222dada6fea2b89ccb7fecfd.tar.xz | |
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Change-Id: I82e0736dc6b44cfcc57cdfdc786c85c4b6882260
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16276
Tested-by: build bot (Jenkins)
Reviewed-by: Omar Pakker
Diffstat (limited to 'src/cpu/x86/16bit')
| -rw-r--r-- | src/cpu/x86/16bit/entry16.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index b4db83400d..cf366e0af6 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -79,7 +79,7 @@ _start16bit: * * The criteria for relocation have been relaxed to their * utmost, so that we can use the same code for both - * our initial entry point and startup of the second cpu. + * our initial entry point and startup of the second CPU. * The code assumes when executing at _start16bit that: * (((cs & 0xfff) == 0) and (ip == _start16bit & 0xffff)) * or |