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authorEric Biederman <ebiederm@xmission.com>2004-10-14 19:29:29 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-14 19:29:29 +0000
commitfcd5ace00b333ce31b11b02a2243dfbf39307f10 (patch)
treed686d752ccea9b185b0008c70d8523749b26e2dd /src/cpu/x86/cache
parent98e619b1cefcb9871185f4cc3db85fa430dcdbce (diff)
downloadcoreboot-fcd5ace00b333ce31b11b02a2243dfbf39307f10.tar.xz
- Add new cvs code to cvs
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/cache')
-rw-r--r--src/cpu/x86/cache/Config.lb1
-rw-r--r--src/cpu/x86/cache/cache.c10
2 files changed, 11 insertions, 0 deletions
diff --git a/src/cpu/x86/cache/Config.lb b/src/cpu/x86/cache/Config.lb
new file mode 100644
index 0000000000..e39bb2da32
--- /dev/null
+++ b/src/cpu/x86/cache/Config.lb
@@ -0,0 +1 @@
+object cache.o
diff --git a/src/cpu/x86/cache/cache.c b/src/cpu/x86/cache/cache.c
new file mode 100644
index 0000000000..92e4a69e29
--- /dev/null
+++ b/src/cpu/x86/cache/cache.c
@@ -0,0 +1,10 @@
+#include <console/console.h>
+#include <cpu/x86/cache.h>
+
+void x86_enable_cache(void)
+{
+ post_code(0x60);
+ printk_info("Enabling cache\n");
+ enable_cache();
+}
+