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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-06 23:14:54 -0600
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-01-16 05:34:25 +0100
commit2c38f50b4ad8850676a70427bf1e2e9e9aab82a4 (patch)
tree68fe15f5e270e69ab9810b12fa2bf61d7ff71585 /src/cpu/x86/lapic/secondary.S
parentb4c39902edbba61827c60a75fe84e748e217b8be (diff)
downloadcoreboot-2c38f50b4ad8850676a70427bf1e2e9e9aab82a4.tar.xz
cpu/intel: Make all Intel CPUs load microcode from CBFS
The sequence to inject microcode updates is virtually the same for all Intel CPUs. The same function is used to inject the update in both CBFS and hardcoded cases, and in both of these cases, the microcode resides in the ROM. This should be a safe change across the board. The function which loaded compiled-in microcode is also removed here in order to prevent it from being used in the future. The dummy terminators from microcode need to be removed if this change is to work when generating microcode from several microcode_blob.c files, as is the case for older socketed CPUs. Removal of dummy terminators is done in a subsequent patch. Change-Id: I2cc8220cc4cd4a87aa7fc750e6c60ccdfa9986e9 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4495 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
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