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authorStefan Reinauer <stepan@coreboot.org>2010-11-22 08:09:50 +0000
committerStefan Reinauer <stepan@openbios.org>2010-11-22 08:09:50 +0000
commitabc0c8551604933ca54e9eaa48c3f00e4915dc90 (patch)
tree2b8b2b7c07329b72f9adeea737e5049435fe4549 /src/cpu/x86/lapic
parente9c447326a0ff5565886b0c18c806c77c4a03cb8 (diff)
downloadcoreboot-abc0c8551604933ca54e9eaa48c3f00e4915dc90.tar.xz
Printing coreboot debug messages on VGA console is pretty much useless, since
initializing VGA happens pretty much as the last thing before starting the payload. Hence, drop VGA console support, as we did in coreboot v3. - Drop VGA and BTEXT console support. Console is meant to be debugging only, and by the time graphics comes up 99% of the risky stuff has already happened. Note: This patch does not remove hardware init but only the actual output functionality. The ragexl driver needs some extra love, but that's for another day - factor out die() and post() - drop some leftover RAMBASE < 0x100000 checks. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: QingPei Wang<wangqingpei@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/lapic')
-rw-r--r--src/cpu/x86/lapic/lapic_cpu_init.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 602e764b77..53bbe79284 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -16,8 +16,6 @@
#include <cpu/cpu.h>
#if CONFIG_SMP == 1
-
-#if CONFIG_RAMBASE >= 0x100000
/* This is a lot more paranoid now, since Linux can NOT handle
* being told there is a CPU when none exists. So any errors
* will return 0, meaning no CPU.
@@ -29,7 +27,6 @@ static unsigned long get_valid_start_eip(unsigned long orig_start_eip)
{
return (unsigned long)orig_start_eip & 0xffff; // 16 bit to avoid 0xa0000
}
-#endif
#if CONFIG_HAVE_ACPI_RESUME == 1
char *lowmem_backup;
@@ -41,7 +38,6 @@ extern char _secondary_start[];
static void copy_secondary_start_to_1m_below(void)
{
-#if CONFIG_RAMBASE >= 0x100000
extern char _secondary_start_end[];
unsigned long code_size;
unsigned long start_eip;
@@ -67,7 +63,6 @@ static void copy_secondary_start_to_1m_below(void)
memcpy((unsigned char *)start_eip, (unsigned char *)_secondary_start, code_size);
printk(BIOS_DEBUG, "start_eip=0x%08lx, offset=0x%08lx, code_size=0x%08lx\n", start_eip, ((unsigned long)_secondary_start - start_eip), code_size);
-#endif
}
static int lapic_start_cpu(unsigned long apicid)
@@ -139,11 +134,7 @@ static int lapic_start_cpu(unsigned long apicid)
return 0;
}
-#if CONFIG_RAMBASE >= 0x100000
start_eip = get_valid_start_eip((unsigned long)_secondary_start);
-#else
- start_eip = (unsigned long)_secondary_start;
-#endif
#if !defined (CONFIG_CPU_AMD_MODEL_10XXX) && !defined (CONFIG_CPU_AMD_MODEL_14XXX)
num_starts = 2;