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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-15 16:47:33 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-16 04:12:47 +0100
commitdfc8a560d7fec715a652f428dc3cab3e0a92c680 (patch)
treeef273e12fc78ab06f6c43c4ad5d144c87aca153d /src/cpu/x86/lapic
parentc5917079eb81b10c58cd3e7bfe6b3925baaf9241 (diff)
downloadcoreboot-dfc8a560d7fec715a652f428dc3cab3e0a92c680.tar.xz
cpu/x86: Fix misc. remaining issues detected by checkpatch
Fix the following error and warnings detected by checkpatch.pl: ERROR: trailing statements should be on next line WARNING: storage class should be at the beginning of the declaration WARNING: type 'long unsigned int' should be specified in [[un]signed] [short|int|long|long long] order TEST=Build and run on Galileo Gen2 Change-Id: I9cfe42cf1836cfd40ffcf67237c818543f508feb Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18845 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/x86/lapic')
-rw-r--r--src/cpu/x86/lapic/lapic_cpu_init.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 262c6d4fb5..427e537ce6 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -95,7 +95,7 @@ static void copy_secondary_start_to_lowest_1M(void)
(unsigned char *)_secondary_start, code_size);
printk(BIOS_DEBUG, "start_eip=0x%08lx, code_size=0x%08lx\n",
- (long unsigned int)AP_SIPI_VECTOR, code_size);
+ (unsigned long int)AP_SIPI_VECTOR, code_size);
}
static void recover_lowest_1M(void)
@@ -408,7 +408,7 @@ void stop_this_cpu(void)
#endif
/* C entry point of secondary cpus */
-void asmlinkage secondary_cpu_init(unsigned int index)
+asmlinkage void secondary_cpu_init(unsigned int index)
{
atomic_inc(&active_cpus);
@@ -490,7 +490,8 @@ static void smm_other_cpus(struct bus *cpu_bus, device_t bsp_cpu)
cpu->path.apic.apic_id);
/* FIXME: endless loop */
- while (atomic_read(&active_cpus) != pre_count);
+ while (atomic_read(&active_cpus) != pre_count)
+ ;
}
}