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authorEric Biederman <ebiederm@xmission.com>2004-10-30 08:05:41 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-30 08:05:41 +0000
commitf8a2dddb573faef41ad43ee111d91d4c5259ad59 (patch)
tree3606ac56f585bce51868b8a5388bf9d0bb4561b9 /src/cpu/x86/lapic
parent0afcba7a3d0e7dc22818ecdfd79230f5fb987f0d (diff)
downloadcoreboot-f8a2dddb573faef41ad43ee111d91d4c5259ad59.tar.xz
- To reduce confuse rename the parts of linuxbios bios that run from
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload... - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86 - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB. - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work. - Start using romcc's built in preprocessor (This will simplify header compiler checks) - Add helper functions for examining all of the resources - Remove debug strings from chip.h - Add llshell to src/arch/i386/llshell (Sometime later I can try it...) - Add the ability to catch exceptions on x86 - Add gdb_stub support to x86 - Removed old cpu options - Added an option so we can detect movnti support - Remove some duplicate definitions from pci_ids.h - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic - Minor romcc bug fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/lapic')
-rw-r--r--src/cpu/x86/lapic/secondary.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 786c31e532..5185021c3c 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -36,6 +36,9 @@ _secondary_start:
movw %ax, %fs
movw %ax, %gs
+ /* Load the Interrupt descriptor table */
+ lidt idtarg
+
/* Set the stack pointer, and flag that we are done */
xorl %eax, %eax
movl secondary_stack, %esp