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authorAaron Durbin <adurbin@chromium.org>2013-03-20 15:50:59 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-22 04:06:42 +0100
commit57686f848597f6b133c9d45a9b98a54638399b32 (patch)
tree22c21ddc2f81cb3616a255061876042c8caf6a74 /src/cpu/x86/mtrr/mtrr.c
parentc8eab2c0441851a141ef47d10022fb385d0eacad (diff)
downloadcoreboot-57686f848597f6b133c9d45a9b98a54638399b32.tar.xz
x86: unify amd and non-amd MTRR routines
The amd_mtrr.c file contains a copy of the fixed MTRR algorithm. However, the AMD code needs to handle the RdMem and WrMem attribute bits in the fixed MTRR MSRs. Instead of duplicating the code with the one slight change introduce a Kconfig option, X86_AMD_FIXED_MTRRS, which indicates that the RdMem and WrMem fields need to be handled for writeback fixed MTRR ranges. The order of how the AMD MTRR setup routine is maintained by providing a x86_setup_fixed_mtrrs_no_enable() function which does not enable the fixed MTRRs after setting them up. All Kconfig files which had a Makefile that included amd/mtrr in the subdirs-y now have a default X86_AMD_FIXED_MTRRS selection. There may be some overlap with the agesa and socket code, but I didn't know the best way to tease out the interdependency. Change-Id: I256d0210d1eb3004e2043b46374dcc0337432767 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2866 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/x86/mtrr/mtrr.c')
-rw-r--r--src/cpu/x86/mtrr/mtrr.c23
1 files changed, 16 insertions, 7 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 5051904a4d..7076a7e213 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -39,6 +39,12 @@
#include <cpu/x86/lapic.h>
#include <arch/cpu.h>
#include <arch/acpi.h>
+#if CONFIG_X86_AMD_FIXED_MTRRS
+#include <cpu/amd/mtrr.h>
+#define MTRR_FIXED_WRBACK_BITS (MTRR_READ_MEM | MTRR_WRITE_MEM)
+#else
+#define MTRR_FIXED_WRBACK_BITS 0
+#endif
static unsigned int mtrr_msr[] = {
MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR,
@@ -325,6 +331,7 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
{
unsigned int start_mtrr;
unsigned int last_mtrr;
+ const unsigned char type = MTRR_TYPE_WRBACK | MTRR_FIXED_WRBACK_BITS;
start_mtrr = fixed_mtrr_index(resk(res->base));
last_mtrr = fixed_mtrr_index(resk((res->base + res->size)));
if (start_mtrr >= NUM_FIXED_RANGES) {
@@ -332,7 +339,7 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
}
printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB\n",
start_mtrr, last_mtrr);
- set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK);
+ set_fixed_mtrrs(start_mtrr, last_mtrr, type);
}
@@ -406,7 +413,7 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res)
state->range_sizek = sizek;
}
-void x86_setup_fixed_mtrrs(void)
+void x86_setup_fixed_mtrrs_no_enable(void)
{
/* Try this the simple way of incrementally adding together
* mtrrs. If this doesn't work out we can get smart again
@@ -425,13 +432,17 @@ void x86_setup_fixed_mtrrs(void)
IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
set_fixed_mtrr_resource, NULL);
printk(BIOS_DEBUG, "DONE fixed MTRRs\n");
+}
- /* enable fixed MTRR */
- printk(BIOS_SPEW, "call enable_fixed_mtrr()\n");
- enable_fixed_mtrr();
+void x86_setup_fixed_mtrrs(void)
+{
+ x86_setup_fixed_mtrrs_no_enable();
+ printk(BIOS_SPEW, "call enable_fixed_mtrr()\n");
+ enable_fixed_mtrr();
}
+
void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb)
/* this routine needs to know how many address bits a given processor
* supports. CPUs get grumpy when you set too many bits in
@@ -500,7 +511,6 @@ void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb)
post_code(0x6A);
}
-
void x86_setup_mtrrs(void)
{
int address_size;
@@ -510,7 +520,6 @@ void x86_setup_mtrrs(void)
x86_setup_var_mtrrs(address_size, 1);
}
-
int x86_mtrr_check(void)
{
/* Only Pentium Pro and later have MTRR */