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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2020-05-22 12:13:43 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-17 09:17:47 +0000 |
| commit | c59d9e3917a4d30d74d64c8210ed3a516b269534 (patch) | |
| tree | ed3dc6c81dd9862b1d84f2997dfb03ffbf89f6e5 /src/cpu/x86/mtrr/mtrr.c | |
| parent | 9de8c8013b93c5e224e16c5514aacf4d761d6971 (diff) | |
| download | coreboot-c59d9e3917a4d30d74d64c8210ed3a516b269534.tar.xz | |
soc/intel/cannonlake/vr_config: Add CFL defaults to TDC powerlimit
Add CFL defaults for VR TDC config and provide Iccmax for additional Xeon
CPUs tested on the Prodrive/Hermes board.
Based on the following Intel documents:
* Document Number 570805 (XEON E EDS Vol 1)
* Document Number 337344 (CFL Datasheet Vol 1)
* Document Number 571264 (CFL CNP PDG)
Change-Id: I681de076318fb647c44cc8b8c42eb297018cc540
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40856
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/cpu/x86/mtrr/mtrr.c')
0 files changed, 0 insertions, 0 deletions