diff options
author | Yinghai Lu <yinghai.lu at amd.com> | 2007-04-06 19:49:05 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2007-04-06 19:49:05 +0000 |
commit | 21332b80d09adac3e6bb54c92e2a5e19db86a784 (patch) | |
tree | 8b8e92b5acb774cfde96464d4048f7ff86a9e4c4 /src/cpu/x86/mtrr | |
parent | 778a42b129aef01be41633051b494e4462588e6b (diff) | |
download | coreboot-21332b80d09adac3e6bb54c92e2a5e19db86a784.tar.xz |
This is part of the outstanding mcp55 commit from January 18th. It will
likely break the build, since it is only a small part, but it needs to
go in at some point and doing it directory by directory makes things
easier.
Signed-off-by: Yinghai Lu <yinghai.lu at amd.com>
Signed-off-by: Ed Swierk <eswierk at arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward at gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/mtrr')
-rw-r--r-- | src/cpu/x86/mtrr/earlymtrr.c | 1 | ||||
-rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 18 |
2 files changed, 18 insertions, 1 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index 1c00bd7dcc..d035efef96 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -42,6 +42,7 @@ static void set_var_mtrr( { /* Bit Bit 32-35 of MTRRphysMask should be set to 1 */ + /* FIXME: It only support 4G less range */ msr_t basem, maskm; basem.lo = base | type; basem.hi = 0; diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 101d11d5e2..9f6a9be0df 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -282,10 +282,16 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc } +#ifndef CONFIG_VAR_MTRR_HOLE +#define CONFIG_VAR_MTRR_HOLE 1 +#endif + struct var_mtrr_state { unsigned long range_startk, range_sizek; unsigned int reg; +#if CONFIG_VAR_MTRR_HOLE unsigned long hole_startk, hole_sizek; +#endif unsigned address_bits; }; @@ -308,6 +314,7 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res) } /* Write the range mtrrs */ if (state->range_sizek != 0) { +#if CONFIG_VAR_MTRR_HOLE if (state->hole_sizek == 0) { /* We need to put that on to hole */ unsigned long endk = basek + sizek; @@ -316,17 +323,22 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res) state->range_sizek = endk - state->range_startk; return; } +#endif state->reg = range_to_mtrr(state->reg, state->range_startk, state->range_sizek, basek, MTRR_TYPE_WRBACK, state->address_bits); +#if CONFIG_VAR_MTRR_HOLE state->reg = range_to_mtrr(state->reg, state->hole_startk, state->hole_sizek, basek, MTRR_TYPE_UNCACHEABLE, state->address_bits); +#endif state->range_startk = 0; state->range_sizek = 0; +#if CONFIG_VAR_MTRR_HOLE state->hole_startk = 0; state->hole_sizek = 0; +#endif } /* Allocate an msr */ - printk_spew(" Allocate an msr - basek = %d, sizek = %d,\n", basek, sizek); + printk_spew(" Allocate an msr - basek = %08x, sizek = %08x,\n", basek, sizek); state->range_startk = basek; state->range_sizek = sizek; } @@ -377,8 +389,10 @@ void x86_setup_var_mtrrs(unsigned address_bits) */ var_state.range_startk = 0; var_state.range_sizek = 0; +#if CONFIG_VAR_MTRR_HOLE var_state.hole_startk = 0; var_state.hole_sizek = 0; +#endif var_state.reg = 0; var_state.address_bits = address_bits; search_global_resources( @@ -388,8 +402,10 @@ void x86_setup_var_mtrrs(unsigned address_bits) /* Write the last range */ var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk, var_state.range_sizek, 0, MTRR_TYPE_WRBACK, var_state.address_bits); +#if CONFIG_VAR_MTRR_HOLE var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk, var_state.hole_sizek, 0, MTRR_TYPE_UNCACHEABLE, var_state.address_bits); +#endif printk_debug("DONE variable MTRRs\n"); printk_debug("Clear out the extra MTRR's\n"); /* Clear out the extra MTRR's */ |