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authorStefan Reinauer <stepan@coresystems.de>2010-08-30 17:53:13 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-30 17:53:13 +0000
commit704b59662d8bf17cac387109a186cc6f702f27f9 (patch)
tree12de99d00ac98616d0d4df8b089603649a93b699 /src/cpu/x86/mtrr
parent849498d4471003ff959e0151828abfe9a7be4621 (diff)
downloadcoreboot-704b59662d8bf17cac387109a186cc6f702f27f9.tar.xz
We call this cache as ram everywhere, so let's call it the same in Kconfig
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/mtrr')
-rw-r--r--src/cpu/x86/mtrr/earlymtrr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c
index 72c471e180..5c83554cb2 100644
--- a/src/cpu/x86/mtrr/earlymtrr.c
+++ b/src/cpu/x86/mtrr/earlymtrr.c
@@ -62,7 +62,7 @@ static inline void cache_lbmem(int type)
enable_cache();
}
-#if !defined(CONFIG_USE_DCACHE_RAM) || (CONFIG_USE_DCACHE_RAM == 0)
+#if !defined(CONFIG_CACHE_AS_RAM) || (CONFIG_CACHE_AS_RAM == 0)
/* the fixed and variable MTTRs are power-up with random values,
* clear them to MTRR_TYPE_UNCACHEABLE for safty.
*/