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| author | Li-Ta Lo <ollie@lanl.gov> | 2005-01-19 23:19:26 +0000 |
|---|---|---|
| committer | Li-Ta Lo <ollie@lanl.gov> | 2005-01-19 23:19:26 +0000 |
| commit | bec039cb93b72b068370662933d961b1cd4aeaea (patch) | |
| tree | fe17932d8215153fe84ea142072a2b956e2a5d0a /src/cpu/x86/mtrr | |
| parent | af021575308fffc104a7add2ba8183cef079876c (diff) | |
| download | coreboot-bec039cb93b72b068370662933d961b1cd4aeaea.tar.xz | |
minor reformat
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/mtrr')
| -rw-r--r-- | src/cpu/x86/mtrr/earlymtrr.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index af4aa30499..c435b2edd5 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -37,8 +37,8 @@ static void disable_var_mtrr(unsigned reg) wrmsr(MTRRphysMask_MSR(reg), zero); } -static void set_var_mtrr( - unsigned reg, unsigned base, unsigned size, unsigned type) +static void set_var_mtrr(unsigned reg, unsigned base, unsigned size, + unsigned type) { /* Bit Bit 32-35 of MTRRphysMask should be set to 1 */ @@ -59,7 +59,6 @@ static void cache_lbmem(int type) enable_cache(); } - /* the fixed and variable MTTRs are power-up with random values, * clear them to MTRR_TYPE_UNCACHEABLE for safty. */ @@ -77,7 +76,7 @@ static void do_early_mtrr_init(const unsigned long *mtrr_msrs) msr.lo = 0; msr.hi = 0; unsigned long msr_nr; - for(msr_addr = mtrr_msrs; (msr_nr = *msr_addr); msr_addr++) { + for (msr_addr = mtrr_msrs; (msr_nr = *msr_addr); msr_addr++) { wrmsr(msr_nr, msr); } |