diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-12-19 15:26:46 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-12-20 16:14:13 +0000 |
| commit | ec2e61ab2fb0a3093571ec034b182e073a2ba6c3 (patch) | |
| tree | 8e2b88c0d73cd8b4b0d2883127e5fe5278835559 /src/cpu/x86/mtrr | |
| parent | 6b6c94bacc13a374abc8069aec7da074121015b9 (diff) | |
| download | coreboot-ec2e61ab2fb0a3093571ec034b182e073a2ba6c3.tar.xz | |
cpu/x86: set permanent SMM handler stack to 1KiB
Not all SMM save state sizes equate to having enough stack in the
permanent SMM handler. Therefore, ensure 1KiB of stack is available for
each cpu's stack. Intel's save state size is 1KiB, but AMD's save state
size is only 512. Therefore, decouple save state size from the per
cpu stack size.
BUG=b:70027919
Change-Id: I54b9e6f3cc0ad6ca3d7b60b2b422b5dc5a78a552
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/22950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/x86/mtrr')
0 files changed, 0 insertions, 0 deletions