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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-15 16:38:51 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-16 04:12:27 +0100
commitc5917079eb81b10c58cd3e7bfe6b3925baaf9241 (patch)
treee07ef6796762e1289430fa146f311d26c951aa65 /src/cpu/x86/mtrr
parent8ca9a21a43ccc73b3f289affd2384805ec98eb81 (diff)
downloadcoreboot-c5917079eb81b10c58cd3e7bfe6b3925baaf9241.tar.xz
cpu/x86: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl: WARNING: line over 80 characters TEST=Build and run on Galileo Gen2 Change-Id: I56ea28826963403dc0719f40c13782c56dc97feb Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18844 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/x86/mtrr')
-rw-r--r--src/cpu/x86/mtrr/mtrr.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index f79cb8fc98..e7c69be482 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -17,7 +17,8 @@
* GNU General Public License for more details.
*
*
- * Reference: Intel Architecture Software Developer's Manual, Volume 3: System Programming
+ * Reference: Intel Architecture Software Developer's Manual, Volume 3: System
+ * Programming
*/
#include <stddef.h>
@@ -198,8 +199,8 @@ static struct memranges *get_physical_address_space(void)
* resources are appropriate for this MTRR type. */
match = IORESOURCE_PREFETCH;
mask |= match;
- memranges_add_resources_filter(addr_space, mask, match, MTRR_TYPE_WRCOMB,
- filter_vga_wrcomb);
+ memranges_add_resources_filter(addr_space, mask, match,
+ MTRR_TYPE_WRCOMB, filter_vga_wrcomb);
/* The address space below 4GiB is special. It needs to be
* covered entirely by range entries so that MTRR calculations