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| author | Patrick Georgi <patrick@georgi-clan.de> | 2012-05-05 15:50:17 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-05-08 00:38:11 +0200 |
| commit | f8f00629e3b5e129a5962fed1b886034f45e844a (patch) | |
| tree | deda750cdf6f034467d33d73daa1481832df33d2 /src/cpu/x86/mtrr | |
| parent | c0e16e7024fbeb11975f0834a5d5d6c0d9f2e34e (diff) | |
| download | coreboot-f8f00629e3b5e129a5962fed1b886034f45e844a.tar.xz | |
Some more #if cleanup
Replace #elif (CONFIG_FOO==1) with #elif CONFIG_FOO
find src -type f -exec sed -i "s,\(#.*\)(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]1),\1\2,g" {} +
(manual tweak since it hit a false positive)
Replace #elif (CONFIG_FOO==0) with #elif !CONFIG_FOO
find src -type f -exec sed -i "s,\(#.*\)(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]0),\1\!\2,g" {} +
Change-Id: I8f4ebf609740dfc53e79d5f1e60f9446364bb07d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1006
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Martin Roth <martin@se-eng.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/x86/mtrr')
| -rw-r--r-- | src/cpu/x86/mtrr/earlymtrr.c | 2 | ||||
| -rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index f8119d3e59..7a1f51de15 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -20,7 +20,7 @@ static void set_var_mtrr( wrmsr(MTRRphysMask_MSR(reg), maskm); } -#if !defined(CONFIG_CACHE_AS_RAM) || (CONFIG_CACHE_AS_RAM == 0) +#if !defined(CONFIG_CACHE_AS_RAM) || !CONFIG_CACHE_AS_RAM static void cache_lbmem(int type) { /* Enable caching for 0 - 1MB using variable mtrr */ diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index c31090547d..cce526a94d 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -464,7 +464,7 @@ void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb) IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, set_var_mtrr_resource, &var_state); -#if (CONFIG_GFXUMA == 1) /* UMA or SP. */ +#if CONFIG_GFXUMA /* UMA or SP. */ /* For now we assume the UMA space is at the end of memory below 4GB */ if (var_state.hole_startk || var_state.hole_sizek) { printk(BIOS_DEBUG, "Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole.\n"); |