summaryrefslogtreecommitdiff
path: root/src/cpu/x86/mtrr
diff options
context:
space:
mode:
authorPaul Menzel <paulepanter@users.sourceforge.net>2014-01-25 15:55:28 +0100
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-01-26 15:59:46 +0100
commit4fe9813adb44b369c84a097b4be3101eddf6b19d (patch)
treed22eb1a875215c1e36666b85041483e291d028cc /src/cpu/x86/mtrr
parentf927df68e491e3bb7bad02a405aae5fd91545155 (diff)
downloadcoreboot-4fe9813adb44b369c84a097b4be3101eddf6b19d.tar.xz
src/cpu: Fix spelling of MTTR to MTRR
Change-Id: Ia4718ac31a5b2bd12f8cda5e107aa878d74d2a03 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/4805 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/cpu/x86/mtrr')
-rw-r--r--src/cpu/x86/mtrr/earlymtrr.c2
-rw-r--r--src/cpu/x86/mtrr/mtrr.c6
2 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c
index 36f94cdf05..0471a9ef9f 100644
--- a/src/cpu/x86/mtrr/earlymtrr.c
+++ b/src/cpu/x86/mtrr/earlymtrr.c
@@ -30,7 +30,7 @@ static void cache_ramstage(void)
const int addr_det = 0;
-/* the fixed and variable MTTRs are power-up with random values,
+/* the fixed and variable MTRRs are power-up with random values,
* clear them to MTRR_TYPE_UNCACHEABLE for safety.
*/
static void do_early_mtrr_init(const unsigned long *mtrr_msrs)
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index dd404a887f..dbedf0fa9e 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -454,7 +454,7 @@ static void write_var_mtrr(struct var_mtrr_state *var_state,
if (var_state->mtrr_index >= bios_mtrrs)
printk(BIOS_WARNING, "Taking a reserved OS MTRR.\n");
if (var_state->mtrr_index >= total_mtrrs) {
- printk(BIOS_ERR, "ERROR: Not enough MTTRs available!\n");
+ printk(BIOS_ERR, "ERROR: Not enough MTRRs available!\n");
return;
}
@@ -670,7 +670,7 @@ static int calc_var_mtrrs(struct memranges *addr_space,
struct var_mtrr_state var_state;
/* The default MTRR cacheability type is determined by calculating
- * the number of MTTRs required for each MTTR type as if it was the
+ * the number of MTRRs required for each MTRR type as if it was the
* default. */
var_state.addr_space = addr_space;
var_state.above4gb = above4gb;
@@ -776,7 +776,7 @@ static void commit_var_mtrrs(struct memranges *addr_space, int def_type,
calc_var_mtrrs_without_hole(&var_state, r);
}
- /* Clear all remaining variable MTTRs. */
+ /* Clear all remaining variable MTRRs. */
for (i = var_state.mtrr_index; i < total_mtrrs; i++)
clear_var_mtrr(i);
}