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authorStefan Reinauer <stepan@coresystems.de>2009-07-21 21:41:42 +0000
committerStefan Reinauer <stepan@openbios.org>2009-07-21 21:41:42 +0000
commit4da810bd53f3e47fe0c5de64b5cec0910237a022 (patch)
treea84537f4ed6e80281e7b68c9ff415551df41389a /src/cpu/x86/smm/smmrelocate.S
parentb657a3c9b726334aac89f1af16495eab3ebefc6b (diff)
downloadcoreboot-4da810bd53f3e47fe0c5de64b5cec0910237a022.tar.xz
add intel speedstep support and some PM fixes.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/smm/smmrelocate.S')
-rw-r--r--src/cpu/x86/smm/smmrelocate.S8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index 136f5630a1..3d1d9d2664 100644
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -20,7 +20,13 @@
*/
#include <arch/asm.h>
-#include "../../../../src/northbridge/intel/i945/ich7.h"
+
+// Make sure no stage 2 code is included:
+#define __ROMCC__
+
+// FIXME: Is this piece of code southbridge specific, or
+// can it be cleaned up so this include is not required?
+#include "../../../southbridge/intel/i82801gx/i82801gx.h"
#undef DEBUG_SMM_RELOCATION
//#define DEBUG_SMM_RELOCATION