diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-07-21 21:19:06 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-07-21 21:19:06 +0000 |
| commit | 4fbefdd1a9c67e3ce2a215192e47278148580c2f (patch) | |
| tree | 2e7ca0b42bf30f63c463552a7c40ebefc3ea1c42 /src/cpu/x86/tsc | |
| parent | 925b6c0c43b92b4790533b15f78ca824f9130d8b (diff) | |
| download | coreboot-4fbefdd1a9c67e3ce2a215192e47278148580c2f.tar.xz | |
* rework tsc based timer code to use inb instead of outb for calibration
* Add generic Local APIC based timer code. This timer does not need expensive
calibration and thus reduces the boot time by up to more than a second.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/tsc')
| -rw-r--r-- | src/cpu/x86/tsc/delay_tsc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c index 946d2cf512..72b1f7196c 100644 --- a/src/cpu/x86/tsc/delay_tsc.c +++ b/src/cpu/x86/tsc/delay_tsc.c @@ -106,10 +106,10 @@ static unsigned long long calibrate_tsc(void) printk_spew("Calibrating delay loop...\n"); start = rdtscll(); - // no udivdi3, dammit. + // no udivdi3 because we don't like libgcc. (only in x86emu) // so we count to 1<< 20 and then right shift 20 for(count = 0; count < (1<<20); count ++) - outb(0x80, 0x80); + inb(0x80); end = rdtscll(); #if 0 |