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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-11-24 16:32:05 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-11 22:47:10 +0000 |
| commit | 1b12b64dab57151d1f04d13d09c1afbf16a7485f (patch) | |
| tree | a912c3447ddc7528fa320d8c254c8b403e79cb55 /src/cpu/x86 | |
| parent | b643d3df8adbc933e02d8c8c7dcc61cc60b65afb (diff) | |
| download | coreboot-1b12b64dab57151d1f04d13d09c1afbf16a7485f.tar.xz | |
AGESA, binaryPI: implement C bootblock
Modify CAR setup to work in bootblock. Provide bootblock C file with
necessary C bootblock functions. Additionally chache the ROM and set
the MMCONF base before jumping to bootblock main.
Change-Id: I29916a96f490ff717c69dc7cd565d74a83dbfb0d
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36914
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/lapic/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/x86/lapic/Makefile.inc b/src/cpu/x86/lapic/Makefile.inc index 9454f8f00a..0d114782e1 100644 --- a/src/cpu/x86/lapic/Makefile.inc +++ b/src/cpu/x86/lapic/Makefile.inc @@ -1,6 +1,7 @@ ramstage-y += lapic.c ramstage-y += lapic_cpu_init.c ramstage-$(CONFIG_SMP) += secondary.S +bootblock-$(CONFIG_UDELAY_LAPIC) += apic_timer.c romstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c ramstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c postcar-$(CONFIG_UDELAY_LAPIC) += apic_timer.c |