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authorPatrick Rudolph <siro@das-labor.org>2019-10-25 08:09:33 +0200
committerAaron Durbin <adurbin@chromium.org>2019-10-29 19:41:19 +0000
commit776da0872efcc58543afbe32fc55202521ef0014 (patch)
tree8c7d4a952693a77634267779293a2458e51fdd84 /src/cpu/x86
parent5f2576089fca9b5b7c00d1dde1223d80fe9c9e2f (diff)
downloadcoreboot-776da0872efcc58543afbe32fc55202521ef0014.tar.xz
arch/x86/*.S: use defines instead of hardcoded values
As preparation for x86_64 clean the assembly code and introduce arch/ram_segs.h similar to existing arch/rom_segs.h. Replace open coded segment values with the defines from the new header. Change-Id: Ib006cd4df59951335506b8153e9347450ec3403e Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36321 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/lapic/secondary.S7
-rw-r--r--src/cpu/x86/sipi_vector.S9
2 files changed, 7 insertions, 9 deletions
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 48360ad532..09cd6f7c30 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -13,6 +13,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic_def.h>
+#include <arch/ram_segs.h>
.text
.globl _secondary_start, _secondary_start_end, _secondary_gdt_addr
@@ -38,7 +39,7 @@ _secondary_start:
orl $0x60000001, %eax /* CD, NW, PE = 1 */
movl %eax, %cr0
- ljmpl $0x10, $__ap_protected_start
+ ljmpl $RAM_CODE_SEG, $__ap_protected_start
/* This will get filled in by C code. */
_secondary_gdt_addr:
@@ -51,11 +52,11 @@ _secondary_start_end:
ap_protected_start:
.code32
lgdt gdtaddr
- ljmpl $0x10, $__ap_protected_start
+ ljmpl $RAM_CODE_SEG, $__ap_protected_start
__ap_protected_start:
- movw $0x18, %ax
+ movw $RAM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S
index edc1e779be..f75a1c9815 100644
--- a/src/cpu/x86/sipi_vector.S
+++ b/src/cpu/x86/sipi_vector.S
@@ -15,15 +15,12 @@
#include <cpu/x86/cr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/x86/msr.h>
+#include <arch/ram_segs.h>
/* The SIPI vector is responsible for initializing the APs in the system. It
* loads microcode, sets up MSRs, and enables caching before calling into
* C code. */
-/* These segment selectors need to match the gdt entries in c_start.S. */
-#define CODE_SEG 0x10
-#define DATA_SEG 0x18
-
.section ".module_parameters", "aw", @progbits
ap_start_params:
gdtaddr:
@@ -83,10 +80,10 @@ _start:
orl $CR0_SET_FLAGS, %eax
movl %eax, %cr0
- ljmpl $CODE_SEG, $1f
+ ljmpl $RAM_CODE_SEG, $1f
1:
.code32
- movw $DATA_SEG, %ax
+ movw $RAM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss