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| author | Duncan Laurie <dlaurie@chromium.org> | 2012-01-09 22:11:25 -0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-03-30 17:47:22 +0200 |
| commit | 8bb772379f89cfd79be56f85d822798fb063360a (patch) | |
| tree | 2d8cd7b2e744102b2e3a11bd5e24e6b554b88503 /src/cpu/x86 | |
| parent | 689e31d18b0fdefdef2d3b2947355e07b496ce77 (diff) | |
| download | coreboot-8bb772379f89cfd79be56f85d822798fb063360a.tar.xz | |
Add Kconfig options to enable TSEG and set a size
Future CPUs will require TSEG use for SMM
Change-Id: I1432569ece4371d6e12c997e90d66c175fa54c5c
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: http://review.coreboot.org/766
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 68946227b9..0eaee2ed40 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -43,3 +43,11 @@ config LOGICAL_CPUS config CACHE_ROM bool default n + +config SMM_TSEG + bool + default n + +config SMM_TSEG_SIZE + hex + default 0 |