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authorAaron Durbin <adurbin@chromium.org>2013-02-08 16:56:51 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-21 18:01:38 +0100
commita146d58ca0375a12f23dc5a4bd25adfa3423114f (patch)
tree874776d78835bf56ba66eba54e2558edd97645de /src/cpu/x86
parente8c866ad45d80de768c9422474449e171d133575 (diff)
downloadcoreboot-a146d58ca0375a12f23dc5a4bd25adfa3423114f.tar.xz
ramstage: prepare for relocation
The current ramstage code contains uses of symbols that cause issues when the ramstage is relocatable. There are 2 scenarios resolved by this patch: 1. Absolute symbols that are actually sizes/limits. The symbols are problematic when relocating a program because there is no way to distinguish a symbol that shouldn't be relocated and one that can. The only way to handle these symbols is to write a program to post process the relocations and keep a whitelist of ones that shouldn't be relocated. I don't believe that is a route that should be taken so fix the users of these sizes/limits encoded as absolute symbols to calculate the size at runtime or dereference a variable in memory containing the size/limit. 2. Absoulte symbols that were relocated to a fixed address. These absolute symbols are generated by assembly files to be placed at a fixed location. Again, these symbols are problematic because one can't distinguish a symbol that can't be relocated. The symbols are again resolved at runtime to allow for proper relocation. For the symbols defining a size either use 2 symbols and calculate the difference or provide a variable in memory containing the size. Change-Id: I1ef2bfe6fd531308218bcaac5dcccabf8edf932c Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2789 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/lapic/lapic_cpu_init.c18
-rw-r--r--src/cpu/x86/lapic/secondary.S8
2 files changed, 23 insertions, 3 deletions
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 9a00b8289f..69430d551f 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -52,12 +52,30 @@ int lowmem_backup_size;
#endif
extern char _secondary_start[];
+extern char _secondary_gdt_addr[];
+extern char gdt[];
+extern char gdt_end[];
+
+static inline void setup_secondary_gdt(void)
+{
+ u16 *gdt_limit;
+ u32 *gdt_base;
+
+ gdt_limit = (void *)&_secondary_gdt_addr;
+ gdt_base = (void *)&gdt_limit[1];
+
+ *gdt_limit = (u32)&gdt_end - (u32)&gdt - 1;
+ *gdt_base = (u32)&gdt;
+}
static void copy_secondary_start_to_lowest_1M(void)
{
extern char _secondary_start_end[];
unsigned long code_size;
+ /* Fill in secondary_start's local gdt. */
+ setup_secondary_gdt();
+
code_size = (unsigned long)_secondary_start_end - (unsigned long)_secondary_start;
#if CONFIG_HAVE_ACPI_RESUME
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 2e0620e2da..6edcd0a366 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -3,7 +3,7 @@
#if CONFIG_SMP && CONFIG_MAX_CPUS > 1
.text
- .globl _secondary_start, _secondary_start_end
+ .globl _secondary_start, _secondary_start_end, _secondary_gdt_addr
.balign 4096
_secondary_start:
.code16
@@ -28,9 +28,11 @@ _secondary_start:
ljmpl $0x10, $__ap_protected_start
+ /* This will get filled in by C code. */
+_secondary_gdt_addr:
gdtaddr:
- .word gdt_limit /* the table limit */
- .long gdt /* we know the offset */
+ .word 0 /* the table limit */
+ .long 0 /* we know the offset */
_secondary_start_end: