summaryrefslogtreecommitdiff
path: root/src/cpu/x86
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-12-18 23:29:37 +0000
committerStefan Reinauer <stepan@openbios.org>2010-12-18 23:29:37 +0000
commitcadc54583877db65f33d2db11088d5fae1b77b74 (patch)
tree86377962deb6e6b1faa2093828ff7cb3e127120b /src/cpu/x86
parent405721d45c8f7cd58c2466e43df8c2aee6f8e714 (diff)
downloadcoreboot-cadc54583877db65f33d2db11088d5fae1b77b74.tar.xz
SMM for AMD K8 Part 1/2
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/smm/smihandler.c22
-rw-r--r--src/cpu/x86/smm/smmrelocate.S4
2 files changed, 25 insertions, 1 deletions
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index 3dddf6c8ae..bdaedf8dbc 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -87,6 +87,24 @@ static void smi_set_eos(void)
southbridge_smi_set_eos();
}
+static u32 pci_orig;
+
+/**
+ * @brief Backup PCI address to make sure we do not mess up the OS
+ */
+static void smi_backup_pci_address(void)
+{
+ pci_orig = inl(0xcf8);
+}
+
+/**
+ * @brief Restore PCI address previously backed up
+ */
+static void smi_restore_pci_address(void)
+{
+ outl(pci_orig, 0xcf8);
+}
+
/**
* @brief Interrupt handler for SMI#
*
@@ -107,6 +125,8 @@ void smi_handler(u32 smm_revision)
return;
}
+ smi_backup_pci_address();
+
node=nodeid();
console_init();
@@ -147,6 +167,8 @@ void smi_handler(u32 smm_revision)
if (southbridge_smi_handler)
southbridge_smi_handler(node, &state_save);
+ smi_restore_pci_address();
+
smi_release_lock();
/* De-assert SMI# signal to allow another SMI */
diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index b1f3290f50..e477830cf1 100644
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -22,6 +22,8 @@
// Make sure no stage 2 code is included:
#define __PRE_RAM__
+#if !defined(CONFIG_NORTHBRIDGE_AMD_AMDK8) && !defined(CONFIG_NORTHBRIDGE_AMD_FAM10)
+
// FIXME: Is this piece of code southbridge specific, or
// can it be cleaned up so this include is not required?
// It's needed right now because we get our DEFAULT_PMBASE from
@@ -177,4 +179,4 @@ smm_relocate:
/* That's it. return */
rsm
smm_relocation_end:
-
+#endif