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authorArthur Heymans <arthur@aheymans.xyz>2019-04-14 18:38:35 +0200
committerMartin Roth <martinroth@google.com>2019-04-21 23:29:29 +0000
commitc4772b9fd7fcc29d09d7617dc8cff922118814d7 (patch)
tree93087aecbff5988ab88888df0eec86d5fd1d92ed /src/cpu/x86
parent0800194f95933d6337ba2e7900a1f02671aed3ba (diff)
downloadcoreboot-c4772b9fd7fcc29d09d7617dc8cff922118814d7.tar.xz
cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset
Checking for empty MTRR_DEF_TYPE_MSR as a proxy for proper CPU reset is common across multiple platforms. Therefore place it in a common location. Change-Id: I81d82fb9fe27cd9de6085251fe1a5685cdd651fc Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32319 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/early_reset.S45
1 files changed, 45 insertions, 0 deletions
diff --git a/src/cpu/x86/early_reset.S b/src/cpu/x86/early_reset.S
new file mode 100644
index 0000000000..ec015abe22
--- /dev/null
+++ b/src/cpu/x86/early_reset.S
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * input %esp: return address (not pointer to return address!)
+ * clobber the content of eax, ecx, edx
+ */
+
+#include <cpu/x86/mtrr.h>
+
+.section .text
+.global check_mtrr
+
+check_mtrr:
+ /* Use the MTRR default type MSR as a proxy for detecting INIT#.
+ * Reset the system if any known bits are set in that MSR. That is
+ * an indication of the CPU not being properly reset. */
+
+check_for_clean_reset:
+ movl $MTRR_DEF_TYPE_MSR, %ecx
+ rdmsr
+ andl $(MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN), %eax
+ cmp $0, %eax
+ jnz warm_reset
+ jmp *%esp
+ /* perform warm reset */
+warm_reset:
+ movw $0xcf9, %dx
+ movb $0x06, %al
+ outb %al, %dx
+ /* Should not reach this*/
+.Lhlt:
+ hlt
+ jmp .Lhlt