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authorArthur Heymans <arthur@aheymans.xyz>2017-04-09 20:48:37 +0200
committerMartin Roth <martinroth@google.com>2017-07-21 15:44:19 +0000
commit349e08535a7666cabe52ebc331e3bce5468b786b (patch)
tree6e337227e7450ac1d931ac61eaf939ae936ad50c /src/cpu/x86
parent7b9c139ac26eded525980e896b354c99c08cdca7 (diff)
downloadcoreboot-349e08535a7666cabe52ebc331e3bce5468b786b.tar.xz
sb/intel/i82801jx: Add correct PCI ids and change names
Change-Id: Ic9226098dafa2465aa5fccc72c442de2b94e44c7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19249 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/smm/smmrelocate.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index 2a950f3eb7..23d107ada6 100644
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -29,6 +29,9 @@
#include "../../../soc/intel/sch/sch.h"
#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801IX)
#include "../../../southbridge/intel/i82801ix/i82801ix.h"
+#elif CONFIG_SOUTHBRIDGE_INTEL_I82801JX
+#include "../../../southbridge/intel/i82801jx/i82801jx.h"
+
#else
#error "Southbridge needs SMM handler support."
#endif