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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-25 15:12:12 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-31 16:28:55 +0000 |
commit | 6acaca7e409e914e6f1d8d58a864002678153ed5 (patch) | |
tree | c3bc7737b5f2c1388af86e349ee17fa7e82a349e /src/cpu/x86 | |
parent | 3754cda8353c7aca28a452b70a8dfb855cf5cfdc (diff) | |
download | coreboot-6acaca7e409e914e6f1d8d58a864002678153ed5.tar.xz |
AGESA: Remove separate f15rl
Change-Id: I18c62ad034249c5ad14e5d5e708b4f0d4bcbf400
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r-- | src/cpu/x86/smm/smmhandler.S | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/x86/smm/smmhandler.S b/src/cpu/x86/smm/smmhandler.S index b57d015789..98d67d3c3c 100644 --- a/src/cpu/x86/smm/smmhandler.S +++ b/src/cpu/x86/smm/smmhandler.S @@ -141,8 +141,7 @@ untampered_lapic: /* This is an ugly hack, and we should find a way to read the CPU index * without relying on the LAPIC ID. */ -#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) \ - || IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_RL) +#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) /* LAPIC IDs start from 0x10; map that to the proper core index */ subl $0x10, %ecx #endif |