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authorIsaac Christensen <isaac.christensen@se-eng.com>2014-09-24 14:59:32 -0600
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-09-25 23:24:03 +0200
commit81f90c58d2eacf8ee2baf2334fd38bbfa0ef7274 (patch)
tree17d76874340eb3dc6b2b8a2d4b6b236e4fc00666 /src/cpu/x86
parentd2f3aa91e0096b087214ee5fc368fa0091d6c52c (diff)
downloadcoreboot-81f90c58d2eacf8ee2baf2334fd38bbfa0ef7274.tar.xz
x86/mtrr: Enable MTRR's before enabling caching
Fix up the following commit by enabling the MTRR's before enabling caching. 7756fe7 x86: Minimize work done with the caches disabled in mtrr functions. Also fix two typos in comments. Change-Id: If751b815f9dab781fc38c898cf692f0940c57695 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6969 Reviewed-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/mtrr/mtrr.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index e0392f7978..69cd2d2eb1 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -51,8 +51,8 @@
#define OS_MTRRS 2
#define MTRRS (BIOS_MTRRS + OS_MTRRS)
/*
- * Static storage size for variable MTRRs. Its sized sufficiently large to
- * handle different types of CPUs. Empiricially, 16 variable MTRRs has not
+ * Static storage size for variable MTRRs. It's sized sufficiently large to
+ * handle different types of CPUs. Empirically, 16 variable MTRRs has not
* yet been observed.
*/
#define NUM_MTRR_STATIC_STORAGE 16
@@ -769,7 +769,7 @@ static void commit_var_mtrrs(const struct var_mtrr_solution *sol)
{
int i;
- /* Write out the variable MTTRs. */
+ /* Write out the variable MTRRs. */
disable_cache();
for (i = 0; i < sol->num_used; i++) {
wrmsr(MTRRphysBase_MSR(i), sol->regs[i].base);
@@ -778,6 +778,7 @@ static void commit_var_mtrrs(const struct var_mtrr_solution *sol)
/* Clear the ones that are unused. */
for (; i < total_mtrrs; i++)
clear_var_mtrr(i);
+ enable_var_mtrr(sol->mtrr_default_type);
enable_cache();
}
@@ -800,7 +801,6 @@ void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb)
}
commit_var_mtrrs(sol);
- enable_var_mtrr(sol->mtrr_default_type);
}
void x86_setup_mtrrs(void)