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| author | Sven Schnelle <svens@stackframe.org> | 2012-01-10 12:01:43 +0100 |
|---|---|---|
| committer | Sven Schnelle <svens@stackframe.org> | 2012-01-10 21:51:40 +0100 |
| commit | adfbcb79ab719af4435e3fdbb8321cda825e076c (patch) | |
| tree | b1a6b834c0c7b50c69a01bd4b969fadc132df472 /src/cpu/x86 | |
| parent | 75fb40e15dbffe4148ab108e11d10fe3a9ed6cbe (diff) | |
| download | coreboot-adfbcb79ab719af4435e3fdbb8321cda825e076c.tar.xz | |
MTRR: get physical address size from CPUID
The current code uses static values for the physical address size
supported by a CPU. This isn't always the right value: I.e. on
model_6[ef]x Core (2) Duo CPUs physical address size is 36, while
Xeons from the same family have 38 bits, which results in invalid
MTRR setup. Fix this by getting the right number from CPUID.
Change-Id: If019c3d9147c3b86357f0ef0d9fda94d49d811ca
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/529
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 8e7beea76e..46d8e2d4c7 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -36,6 +36,7 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> +#include <arch/cpu.h> #if CONFIG_GFXUMA extern uint64_t uma_memory_base, uma_memory_size; @@ -462,10 +463,13 @@ void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb) } -void x86_setup_mtrrs(unsigned address_bits) +void x86_setup_mtrrs(void) { + int address_size; x86_setup_fixed_mtrrs(); - x86_setup_var_mtrrs(address_bits, 1); + address_size = cpu_phys_address_size(); + printk(BIOS_DEBUG, "CPU physical address size: %d bits\n", address_size); + x86_setup_var_mtrrs(address_size, 1); } |