diff options
| author | Patrick Georgi <patrick@georgi-clan.de> | 2012-02-16 20:44:20 +0100 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-02-17 19:04:31 +0100 |
| commit | 472efa604158c193bdcd8f357ca52c41eca53ca5 (patch) | |
| tree | b44dbe7045988d316f03a807ef34fc360e2ca31a /src/cpu/x86 | |
| parent | d13e4167a903c1bd69c9ed708987f016dff13d1d (diff) | |
| download | coreboot-472efa604158c193bdcd8f357ca52c41eca53ca5.tar.xz | |
Remove whitespace.
Fix issues reported by new lint test.
Change-Id: I077a829cb4a855cbb3b71b6eb5c66b2068be6def
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/646
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/32bit/entry32.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 740ea47bc7..f74e1b8737 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -6,8 +6,8 @@ .code32 - /* This is the GDT for the ROM stage part of coreboot. It - * is different from the RAM stage GDT which is defined in + /* This is the GDT for the ROM stage part of coreboot. It + * is different from the RAM stage GDT which is defined in * c_start.S */ |