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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2020-08-15 06:14:57 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2020-08-19 09:07:58 +0000 |
| commit | e3dd57e1061760d37a3b1e38fc9a9c1ff9fdba66 (patch) | |
| tree | 5afb698c09cb054ef67afa612d06c20779b71645 /src/cpu/x86 | |
| parent | e563815e059ef5881a42e6f8b37094783771d5a7 (diff) | |
| download | coreboot-e3dd57e1061760d37a3b1e38fc9a9c1ff9fdba66.tar.xz | |
cpu/x86/64bit/exit32: Add support for ramstage
When compiled in RAMSTAGE use the segments for ramstage.
Allows to call this assembly code in ramstage to exit long mode.
The next commit makes use of this.
Tested on qemu:
Still boots on x86_64.
Change-Id: I8beb31866bd15afc206b480b1ba05df995adc402
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44504
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/64bit/exit32.inc | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/cpu/x86/64bit/exit32.inc b/src/cpu/x86/64bit/exit32.inc index 48837d96a9..6722cfdf3f 100644 --- a/src/cpu/x86/64bit/exit32.inc +++ b/src/cpu/x86/64bit/exit32.inc @@ -12,14 +12,22 @@ #include <cpu/x86/msr.h> #include <cpu/x86/cr.h> +#if defined(__RAMSTAGE__) +#include <arch/ram_segs.h> +#define CODE_SEG RAM_CODE_SEG +#define DATA_SEG RAM_DATA_SEG +#else #include <arch/rom_segs.h> +#define CODE_SEG ROM_CODE_SEG +#define DATA_SEG ROM_DATA_SEG +#endif drop_longmode: /* Ensure cache is clean. */ wbinvd /* Set 32-bit code segment and ss */ - mov $ROM_CODE_SEG, %rcx + mov $CODE_SEG, %rcx /* SetCodeSelector32 will drop us to protected mode on return */ call SetCodeSelector32 @@ -54,7 +62,7 @@ __longmode_compatibility: /* Running in 32-bit compatibility mode */ /* Use flat data segment */ - movl $ROM_DATA_SEG, %eax + movl $DATA_SEG, %eax movl %eax, %ds movl %eax, %es movl %eax, %ss |