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| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-07-06 18:18:22 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-06 22:13:07 +0200 |
| commit | 5a2bd0b69313aabcff7e7965494429c0b8dbdda4 (patch) | |
| tree | bb53b82af6f57600d2dcd7fc439ba10b44f57d12 /src/cpu/x86 | |
| parent | 1142197e27a9887b9a7aa284d244dfd2c4fc38cb (diff) | |
| download | coreboot-5a2bd0b69313aabcff7e7965494429c0b8dbdda4.tar.xz | |
Revert "sandy/ivybridge: use LAPIC timer in SMM"
This reverts commit a3aa8da2acec28670b724b7897ae054592746674.
Chrome OS builds require the monotonic timer API in SMM for ELOG_GSMI,
but sandy/ivy doesn't provide it. The commit tried to work around that
by using generic LAPIC code instead, but this leads to multiple
definition errors in other configurations (and it may be unreliable once
the OS reconfigured the APIC timers anyhow).
This fixes the situation for the non-ELOG_GSMI case (which is more or
less everybody but Chrome OS). ELOG_GSMI requires a separate fix.
Change-Id: If4d69a122b020e5b2d2316b8da225435f6b2bef0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10811
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/lapic/Makefile.inc | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/x86/lapic/Makefile.inc b/src/cpu/x86/lapic/Makefile.inc index baa8292d30..3061024f39 100644 --- a/src/cpu/x86/lapic/Makefile.inc +++ b/src/cpu/x86/lapic/Makefile.inc @@ -3,8 +3,5 @@ ramstage-y += lapic_cpu_init.c ramstage-y += secondary.S romstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c ramstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c -ifeq ($(CONFIG_LAPIC_MONOTONIC_TIMER),y) -smm-$(CONFIG_UDELAY_LAPIC) += apic_timer.c -endif romstage-y += boot_cpu.c ramstage-y += boot_cpu.c |