diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2008-01-18 15:08:58 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2008-01-18 15:08:58 +0000 |
| commit | f8ee1806ac524bc782c93eccc59ee3c929abddb9 (patch) | |
| tree | 7daab6b3aa82476a10d38fbf68068f4a409d2ce9 /src/cpu/x86 | |
| parent | 7e61e45402aba2b90997f4f02ca8266cf65a229a (diff) | |
| download | coreboot-f8ee1806ac524bc782c93eccc59ee3c929abddb9.tar.xz | |
Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/32bit/entry32.inc | 6 | ||||
| -rw-r--r-- | src/cpu/x86/car/copy_and_run.c | 4 | ||||
| -rw-r--r-- | src/cpu/x86/lapic/lapic_cpu_init.c | 4 | ||||
| -rw-r--r-- | src/cpu/x86/pae/pgtbl.c | 2 |
4 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 1c18a502fa..2cea40f8a7 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -1,4 +1,4 @@ -/* For starting linuxBIOS in protected mode */ +/* For starting coreboot in protected mode */ #include <arch/rom_segs.h> @@ -8,8 +8,8 @@ .align 4 .globl gdtptr - /* This is the gdt for ROMCC/ASM part of LinuxBIOS. - * It is different from the gdt in GCC part of LinuxBIOS + /* This is the gdt for ROMCC/ASM part of coreboot. + * It is different from the gdt in GCC part of coreboot * which is defined in c_start.S */ gdt: gdtptr: diff --git a/src/cpu/x86/car/copy_and_run.c b/src/cpu/x86/car/copy_and_run.c index 6baf53ec8f..a7ccf9c173 100644 --- a/src/cpu/x86/car/copy_and_run.c +++ b/src/cpu/x86/car/copy_and_run.c @@ -15,7 +15,7 @@ static void copy_and_run(unsigned cpu_reset) unsigned long dst_len; unsigned long ilen, olen; - print_debug("Copying LinuxBIOS to RAM.\r\n"); + print_debug("Copying coreboot to RAM.\r\n"); #if !CONFIG_COMPRESS __asm__ volatile ( @@ -53,7 +53,7 @@ static void copy_and_run(unsigned cpu_reset) #else print_debug("linxbios_ram.bin length = "); print_debug_hex32(olen); print_debug("\r\n"); #endif - print_debug("Jumping to LinuxBIOS.\r\n"); + print_debug("Jumping to coreboot.\r\n"); if(cpu_reset == 1 ) { __asm__ volatile ( diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 1adafc8d18..0bc8bbaf07 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -1,5 +1,5 @@ /* - 2005.12 yhlu add linuxbios_ram cross the vga font buffer handling + 2005.12 yhlu add coreboot_ram cross the vga font buffer handling 2005.12 yhlu add _RAMBASE above 1M support for SMP */ @@ -191,7 +191,7 @@ static int lapic_start_cpu(unsigned long apicid) return 1; } -/* Number of cpus that are currently running in linuxbios */ +/* Number of cpus that are currently running in coreboot */ static atomic_t active_cpus = ATOMIC_INIT(1); /* start_cpu_lock covers last_cpu_index and secondary_stack. diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c index 53db758ce2..2ccee666d8 100644 --- a/src/cpu/x86/pae/pgtbl.c +++ b/src/cpu/x86/pae/pgtbl.c @@ -1,5 +1,5 @@ /* - 2005.12 yhlu add linuxbios_ram cross the vga font buffer handling + 2005.12 yhlu add coreboot_ram cross the vga font buffer handling */ #include <console/console.h> |