diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-06-16 14:20:10 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-06-22 03:46:19 +0000 |
| commit | 154d209ac3636cf9d2340e80b0ded932e04a251d (patch) | |
| tree | 47c5ed049110864d3e88fd49df2fa5d14d30f691 /src/cpu/x86 | |
| parent | 9e01a0be89f685e7f74392564ebdeaaf78359a50 (diff) | |
| download | coreboot-154d209ac3636cf9d2340e80b0ded932e04a251d.tar.xz | |
cpu/x86/sipi_vector: use macros for CR0 flags
Use the existing macros for CR0 to set the flags in the
SIPI vector code.
Change-Id: Iad231b7611b613512fd000a7013175e91542ac10
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/20243
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/sipi_vector.S | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S index 2bcce8813d..1c5120763e 100644 --- a/src/cpu/x86/sipi_vector.S +++ b/src/cpu/x86/sipi_vector.S @@ -14,6 +14,8 @@ * GNU General Public License for more details. */ +#include <cpu/x86/cr.h> + /* The SIPI vector is responsible for initializing the APs in the sytem. It * loads microcode, sets up MSRs, and enables caching before calling into * C code. */ @@ -50,6 +52,11 @@ c_handler: ap_count: .long 0 +#define CR0_CLEAR_FLAGS_CACHE_ENABLE (CR0_CD | CR0_NW) +#define CR0_SET_FLAGS (CR0_CLEAR_FLAGS_CACHE_ENABLE | CR0_PE) +#define CR0_CLEAR_FLAGS \ + (CR0_PG | CR0_AM | CR0_WP | CR0_NE | CR0_TS | CR0_EM | CR0_MP) + .text .code16 .global _start @@ -75,8 +82,8 @@ _start: data32 lgdt (%ebx) movl %cr0, %eax - andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0 */ - orl $0x60000001, %eax /* CD, NW, PE = 1 */ + andl $~CR0_CLEAR_FLAGS, %eax + orl $CR0_SET_FLAGS, %eax movl %eax, %cr0 ljmpl $CODE_SEG, $1f @@ -175,7 +182,7 @@ load_msr: 1: /* Enable caching. */ mov %cr0, %eax - and $0x9fffffff, %eax /* CD, NW = 0 */ + and $~(CR0_CLEAR_FLAGS_CACHE_ENABLE), %eax mov %eax, %cr0 /* c_handler(cpu_num) */ |