summaryrefslogtreecommitdiff
path: root/src/cpu/x86
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-18 16:33:39 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-21 07:00:45 +0000
commit12b121cdb450d96309dd96b2ccc25fc5501d2250 (patch)
tree1d94c123c23512b811d69d9876ac9a860bbbe0f6 /src/cpu/x86
parent544b572c07bb09aba36705b5d8ffca3b793323f6 (diff)
downloadcoreboot-12b121cdb450d96309dd96b2ccc25fc5501d2250.tar.xz
southbridge/intel: Tidy up preprocessor and headers
Change-Id: I52a7b39566acd64ac21a345046675e05649a40f5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34980 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/smm/smmrelocate.S3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index e23b082aa7..ee3316aa7a 100644
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -14,9 +14,6 @@
* GNU General Public License for more details.
*/
-// Make sure no stage 2 code is included:
-#define __PRE_RAM__
-
// FIXME: Is this piece of code southbridge specific, or
// can it be cleaned up so this include is not required?
// It's needed right now because we get our DEFAULT_PMBASE from