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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-28 16:05:08 +0100 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-19 03:25:05 +0000 |
commit | 1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b (patch) | |
tree | 096daea96736744fef239ec85a766777647119d8 /src/cpu | |
parent | 4f66cb9b2867bcdeb47df9fe76e8893d53f85fb8 (diff) | |
download | coreboot-1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b.tar.xz |
Drop ROMCC code and header guards
Change-Id: I730f80afd8aad250f26534435aec24bea75a849c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/x86/16bit/entry16.inc | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index e0babd5a5a..40c0e991a6 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -29,13 +29,10 @@ #include <arch/rom_segs.h> -#if !CONFIG(ROMCC_BOOTBLOCK) || \ - CONFIG(SIPI_VECTOR_IN_ROM) /* Symbol _start16bit must be aligned to 4kB to start AP CPUs with * Startup IPI message without RAM. */ .align 4096 -#endif .code16 .globl _start16bit .type _start16bit, @function |