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authorAaron Durbin <adurbin@chromium.org>2018-09-13 02:10:45 -0600
committerAaron Durbin <adurbin@chromium.org>2018-09-14 08:16:37 +0000
commit75a62e76486f63f6dadb5492c205570ace81e9d5 (patch)
treec3338d2ddd7b2f9f51f35432a24087fc289999fb /src/cpu
parentcf9ea55473cde8b9a2b9494eca452df7783376e5 (diff)
downloadcoreboot-75a62e76486f63f6dadb5492c205570ace81e9d5.tar.xz
complier.h: add __always_inline and use it in code base
Add a __always_inline macro that wraps __attribute__((always_inline)) and replace current users with the macro, excluding files under src/vendorcode. Change-Id: Ic57e474c1d2ca7cc0405ac677869f78a28d3e529 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/28587 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@google.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/car/disable_cache_as_ram.c5
-rw-r--r--src/cpu/amd/family_10h-family_15h/init_cpus.c3
-rw-r--r--src/cpu/x86/smm/smihandler.c2
3 files changed, 6 insertions, 4 deletions
diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c
index af5a2e985d..36d4120453 100644
--- a/src/cpu/amd/car/disable_cache_as_ram.c
+++ b/src/cpu/amd/car/disable_cache_as_ram.c
@@ -19,10 +19,11 @@
* WARNING: this file will be used by both any AP cores and core 0 / node 0
*/
+#include <compiler.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
-static inline __attribute__((always_inline)) uint32_t amd_fam1x_cpu_family(void)
+static __always_inline uint32_t amd_fam1x_cpu_family(void)
{
uint32_t family;
@@ -32,7 +33,7 @@ static inline __attribute__((always_inline)) uint32_t amd_fam1x_cpu_family(void)
return family;
}
-static inline __attribute__((always_inline))
+static __always_inline
void disable_cache_as_ram_real(uint8_t skip_sharedc_config)
{
msr_t msr;
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index f1a607b6ea..4911eca38a 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include "init_cpus.h"
#if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE)
@@ -231,7 +232,7 @@ static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue)
static void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid);
#endif
-static inline __attribute__((always_inline))
+static __always_inline
void print_apicid_nodeid_coreid(u32 apicid, struct node_core_id id,
const char *str)
{
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index d888e4410b..99a62896de 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -60,7 +60,7 @@ void smi_release_lock(void)
}
#define LAPIC_ID 0xfee00020
-static inline __attribute__((always_inline)) unsigned long nodeid(void)
+static __always_inline unsigned long nodeid(void)
{
return (*((volatile unsigned long *)(LAPIC_ID)) >> 24);
}