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authorRonald G. Minnich <rminnich@gmail.com>2005-09-26 16:48:24 +0000
committerRonald G. Minnich <rminnich@gmail.com>2005-09-26 16:48:24 +0000
commit803719a22ddead2da5b3687d176c008428831b85 (patch)
tree40bec315b497e202b34a14804954bec2e1a46415 /src/cpu
parenta4baa1673e211d1a78489be32cd988bef44fe6bb (diff)
downloadcoreboot-803719a22ddead2da5b3687d176c008428831b85.tar.xz
comments mods. THings are working better, so I'm less unhappy with
this part :-) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/sc520/raminit.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/amd/sc520/raminit.c b/src/cpu/amd/sc520/raminit.c
index e1975b721c..af4890c1a8 100644
--- a/src/cpu/amd/sc520/raminit.c
+++ b/src/cpu/amd/sc520/raminit.c
@@ -367,7 +367,7 @@ static void dumpram(void){
* causing romcc real headaches, so we're going to be be a little
* less silly.
* so, the order of ops is:
- * for in 3 to 0
+ * for i in 3 to 0
* see if bank is there.
* if we can write a word, and read it back, to hell with paranoia
* the bank is there. So write the magic byte, read it back, and
@@ -701,8 +701,8 @@ bad_ram:
#endif
}
-/* note: based on AMD code, but AMD code is BROKEN AFAIK */
-/* this does now work worth shit. */
+/* note: based on AMD code*/
+/* This code is known to work on the digital logic board. */
int
staticmem(void){
volatile unsigned long *zero = (unsigned long *) CACHELINESZ;