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authorRonald G. Minnich <rminnich@gmail.com>2005-09-23 17:08:58 +0000
committerRonald G. Minnich <rminnich@gmail.com>2005-09-23 17:08:58 +0000
commit87888630b27ae64218abc1abcf06a213eb342d97 (patch)
treedacc71f2b82b9619f81995cd1c2871d6096a6c38 /src/cpu
parenta25120a30fd1738fada2df0d5528430f9f9070c1 (diff)
downloadcoreboot-87888630b27ae64218abc1abcf06a213eb342d97.tar.xz
sc520 support -- ethernet works
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/sc520/sc520.c43
1 files changed, 41 insertions, 2 deletions
diff --git a/src/cpu/amd/sc520/sc520.c b/src/cpu/amd/sc520/sc520.c
index 8a0334bbb3..1199ec4b50 100644
--- a/src/cpu/amd/sc520/sc520.c
+++ b/src/cpu/amd/sc520/sc520.c
@@ -37,11 +37,31 @@ static void cpu_init(device_t dev)
}
+/* Ollie says: make a northbridge/amd/sc520. Ron sez:
+ * there is no real northbridge, keep it here in cpu.
+ * Ron wins, he's writing the code.
+ */
+void sc520_enable_resources(struct device *dev) {
+ unsigned char command;
+
+ printk_spew("%s\n", __FUNCTION__);
+ command = pci_read_config8(dev, PCI_COMMAND);
+ printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command);
+ command |= PCI_COMMAND_MEMORY | PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
+ printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command);
+ pci_write_config8(dev, PCI_COMMAND, command);
+ command = pci_read_config8(dev, PCI_COMMAND);
+ printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command);
+/*
+ */
+
+}
+
static struct device_operations cpu_operations = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
+ .enable_resources = sc520_enable_resources,
.init = cpu_init,
.enable = 0,
.ops_pci = 0,
@@ -166,10 +186,29 @@ static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
return max;
}
+
+static void enable_resources(device_t dev) {
+
+ printk_spew("%s\n", __FUNCTION__);
+ printk_spew("THIS IS FOR THE SC520 =============================\n");
+
+/*
+ command = pci_read_config8(dev, PCI_COMMAND);
+ printk_spew("%s, command 0x%x\n", __FUNCTION__, command);
+ command |= PCI_COMMAND_MEMORY;
+ printk_spew("%s, command 0x%x\n", __FUNCTION__, command);
+ pci_write_config8(dev, PCI_COMMAND, command);
+ command = pci_read_config8(dev, PCI_COMMAND);
+ printk_spew("%s, command 0x%x\n", __FUNCTION__, command);
+ */
+ enable_childrens_resources(dev);
+ printk_spew("%s\n", __FUNCTION__);
+}
+
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
- .enable_resources = enable_childrens_resources,
+ .enable_resources = enable_resources,
.init = 0,
.scan_bus = pci_domain_scan_bus,
};