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authorAaron Durbin <adurbin@chromium.org>2016-02-05 14:58:06 -0600
committerAaron Durbin <adurbin@chromium.org>2016-02-10 18:08:28 +0100
commita02bb653fdfdd0e1c0426d3573a979594a93eb58 (patch)
tree8d33cfda3caad26be235469becf6aee39de34c0d /src/cpu
parent5a70d6bdf2e70b29740a36061321af59b3005f85 (diff)
downloadcoreboot-a02bb653fdfdd0e1c0426d3573a979594a93eb58.tar.xz
cpu/intel/microcode: allow microcode to be loaded in romstage
The previous usage of the intel microcode support supported using the library under ROMCC and ramstage. Allow for microcode support to be used in normal C-based romstage as well by: 1. Only using walkcbfs when ROMCC is defined. 2. Only using spinlocks if !__PRE_RAM__ The header file now unconditionally exposes the declarations of the supporting functions. Change-Id: I903578bcb4422b4c050903c53b60372b64b79af1 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13611 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/microcode/Makefile.inc1
-rw-r--r--src/cpu/intel/microcode/microcode.c8
2 files changed, 5 insertions, 4 deletions
diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc
index 1feb50495a..7452973319 100644
--- a/src/cpu/intel/microcode/Makefile.inc
+++ b/src/cpu/intel/microcode/Makefile.inc
@@ -3,3 +3,4 @@
## directly from CBFS. You have been WARNED!!!
################################################################################
ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
+romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 35eff160d5..b0681414a1 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -19,7 +19,10 @@
#include <stdint.h>
#include <stddef.h>
#if !defined(__ROMCC__)
+#include <cbfs.h>
#include <console/console.h>
+#else
+#include <arch/cbfs.h>
#endif
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
@@ -27,11 +30,8 @@
#include <rules.h>
#if !defined(__PRE_RAM__)
-#include <cbfs.h>
#include <smp/spinlock.h>
DECLARE_SPIN_LOCK(microcode_lock)
-#else
-#include <arch/cbfs.h>
#endif
struct microcode {
@@ -121,7 +121,7 @@ const void *intel_microcode_find(void)
unsigned int x86_model, x86_family;
msr_t msr;
-#ifdef __PRE_RAM__
+#ifdef __ROMCC__
struct cbfs_file *microcode_file;
microcode_file = walkcbfs_head((char *) MICROCODE_CBFS_FILE);