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authorHung-Te Lin <hungte@chromium.org>2013-02-06 22:01:18 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-02-08 03:24:09 +0100
commitb868d40830787ba5a92721d131c38165285b7795 (patch)
tree382cf2dbf7896d9e370a1361797a72bd35540882 /src/cpu
parent580fa2bf316d4796e5ed76cbbd3e454479fb0688 (diff)
downloadcoreboot-b868d40830787ba5a92721d131c38165285b7795.tar.xz
armv7: Use same console initialization procedure for all ARM stages
Use same console initialization procedure for all ARM stages (bootblock, romstage, and ramstage): #include <console/console.h> ... console_init() ... printk(level, format, ...) Verified to boot on armv7/snow with console messages in all stages. Change-Id: Idd689219035e67450ea133838a2ca02f8d74557e Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2301 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/samsung/exynos5-common/uart.h2
-rw-r--r--src/cpu/samsung/exynos5250/Makefile.inc13
-rw-r--r--src/cpu/samsung/exynos5250/uart.c4
3 files changed, 7 insertions, 12 deletions
diff --git a/src/cpu/samsung/exynos5-common/uart.h b/src/cpu/samsung/exynos5-common/uart.h
index 52da62d55a..350e224b86 100644
--- a/src/cpu/samsung/exynos5-common/uart.h
+++ b/src/cpu/samsung/exynos5-common/uart.h
@@ -52,6 +52,4 @@ static inline int s5p_uart_divslot(void)
return 0;
}
-void uart_init(void);
-
#endif
diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc
index 1c6d7169a0..13baa7ef65 100644
--- a/src/cpu/samsung/exynos5250/Makefile.inc
+++ b/src/cpu/samsung/exynos5250/Makefile.inc
@@ -10,7 +10,7 @@ bootblock-y += clock_init.c
bootblock-y += clock.c
bootblock-y += pinmux.c
bootblock-y += soc.c
-bootblock-y += uart.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
romstage-y += clock.c
romstage-y += clock_init.c
@@ -18,23 +18,18 @@ romstage-y += exynos_cache.c
romstage-y += pinmux.c
romstage-y += power.c
romstage-y += soc.c
-romstage-y += uart.c
romstage-y += dmc_common.c
romstage-y += dmc_init_ddr3.c
+romstage-$(CONFIG_EARLY_CONSOLE) += uart.c
-#ramstage-y += clock.c
-#ramstage-y += clock_init.c
-#ramstage-y += power.c
-#ramstage-y += uart.c
-#ramstage-y += pinmux.c
-##ramstage-y += tzpc_init.c
+#ramstage-y += tzpc_init.c
ramstage-y += clock.c
ramstage-y += clock_init.c
ramstage-y += exynos_cache.c
ramstage-y += pinmux.c
ramstage-y += power.c
ramstage-y += soc.c
-ramstage-y += uart.c
+ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
#ramstage-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.c
#ramstage-$(CONFIG_SATA_AHCI) += sata.c
diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c
index 92ffd26599..3e80017a2c 100644
--- a/src/cpu/samsung/exynos5250/uart.c
+++ b/src/cpu/samsung/exynos5250/uart.c
@@ -28,6 +28,8 @@
#include <console/console.h> /* for __console definition */
#include <cpu/samsung/exynos5-common/exynos5-common.h>
+#include <cpu/samsung/exynos5-common/uart.h>
+#include <cpu/samsung/exynos5250/uart.h>
#include <cpu/samsung/exynos5250/clk.h>
#define RX_FIFO_COUNT_MASK 0xff
@@ -191,7 +193,7 @@ static void exynos5_uart_tx_byte(unsigned char data)
writeb(data, &uart->utxh);
}
-#if !defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__)
+#if !defined(__PRE_RAM__)
static const struct console_driver exynos5_uart_console __console = {
.init = exynos5_init_dev,
.tx_byte = exynos5_uart_tx_byte,