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authorArthur Heymans <arthur@aheymans.xyz>2019-11-02 22:20:17 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-04 11:37:42 +0000
commitf6a8c5a493855370a5d695ed8cde2d03c659d68a (patch)
tree7f7036725bc0cdc7ba89dc6dc9d3f1d6c524ecde /src/cpu
parent228f004f76c619358f18bba52742e94405289479 (diff)
downloadcoreboot-f6a8c5a493855370a5d695ed8cde2d03c659d68a.tar.xz
cpu/intel/smm/gen1: Deal with SMM save state compatibility
Change-Id: I92326e3e0481d750cb9c90f717ed748000e33ad3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36587 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/smm/gen1/smmrelocate.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index 3eb869ae1f..5350d1c930 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -168,6 +168,9 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
if (smm_reloc_params.ied_size)
setup_ied_area(&smm_reloc_params);
+ /* This may not be be correct for older CPU's supported by this code,
+ but given that em64t101_smm_state_save_area_t is larger than the
+ save_state of these CPU's it works. */
*smm_save_state_size = sizeof(em64t101_smm_state_save_area_t);
}
@@ -191,6 +194,8 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
{
msr_t mtrr_cap;
struct smm_relocation_params *relo_params = &smm_reloc_params;
+ /* The em64t101 save state is sufficiently compatible with older
+ save states with regards of smbase, smm_revision. */
em64t101_smm_state_save_area_t *save_state;
u32 smbase = staggered_smbase;
u32 iedbase = relo_params->ied_base;
@@ -208,7 +213,10 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
save_state = (void *)(curr_smbase + SMM_DEFAULT_SIZE -
sizeof(*save_state));
save_state->smbase = smbase;
- save_state->iedbase = iedbase;
+
+ printk(BIOS_SPEW, "SMM revision: 0x%08x\n", save_state->smm_revision);
+ if (save_state->smm_revision == 0x00030101)
+ save_state->iedbase = iedbase;
/* Write EMRR and SMRR MSRs based on indicated support. */
mtrr_cap = rdmsr(MTRR_CAP_MSR);