diff options
author | Martin Roth <gaumless@gmail.com> | 2017-10-15 14:20:28 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-01-15 23:23:30 +0000 |
commit | 0026a53562595cafb466e4ff836c50a7817d5297 (patch) | |
tree | 4d5f4062df24cdaa0109e9bddac81c587ea36d0e /src/cpu | |
parent | 732fb2ab5363968a12b2270319189c2a2a536a36 (diff) | |
download | coreboot-0026a53562595cafb466e4ff836c50a7817d5297.tar.xz |
Intel sch board & chip: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
chips:
soc/intel/sch
Mainboards:
mainboard/iwave/iWRainbowG6
Change-Id: Ida0570988a23fd0d13c6fcbe54f94ab0668c9eae
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22027
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/x86/smm/smmrelocate.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S index 230c78d079..ed556db7fc 100644 --- a/src/cpu/x86/smm/smmrelocate.S +++ b/src/cpu/x86/smm/smmrelocate.S @@ -25,8 +25,6 @@ #include "../../../southbridge/intel/i82801gx/i82801gx.h" #elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801DX) #include "../../../southbridge/intel/i82801dx/i82801dx.h" -#elif IS_ENABLED(CONFIG_SOC_INTEL_SCH) -#include "../../../soc/intel/sch/sch.h" #elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801IX) #include "../../../southbridge/intel/i82801ix/i82801ix.h" #elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801JX) |