diff options
| author | Nils Jacobs <njacobs8@hetnet.nl> | 2010-12-26 05:21:18 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2010-12-26 05:21:18 +0000 |
| commit | 642509c965341d3eee09a5f2bd3650e95f85b851 (patch) | |
| tree | c3bd70472539e433bc1fa361cc4ccbe40ee10101 /src/cpu | |
| parent | 3344743215acab0b7805592a7c52a9c93636b347 (diff) | |
| download | coreboot-642509c965341d3eee09a5f2bd3650e95f85b851.tar.xz | |
Remove dead and unused Geode GX2 code
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6210 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/model_gx2/cpureginit.c | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/src/cpu/amd/model_gx2/cpureginit.c b/src/cpu/amd/model_gx2/cpureginit.c index f8efd9a2a5..cfb86aa327 100644 --- a/src/cpu/amd/model_gx2/cpureginit.c +++ b/src/cpu/amd/model_gx2/cpureginit.c @@ -4,8 +4,6 @@ void cpuRegInit (void) { int msrnum; msr_t msr; - /* Turn on BTM for early debug based on setup. */ - // if (getnvram( TOKEN_BTM_DIAG_MODE) & 3) { /* The following is only for diagnostics mode; do not use for OLPC */ if (0) { /* Set Diagnostic Mode */ @@ -125,37 +123,10 @@ void cpuRegInit (void) } /* FPU impercise exceptions bit */ - //if (getnvram( TOKEN_FPU_IE_ENABLE) != TVALUE_DISABLE) { { msrnum = CPU_FPU_MSR_MODE; msr = rdmsr(msrnum); msr.lo |= FPU_IE_SET; wrmsr(msrnum, msr); } - -#if 0 - /* Cache Overides */ - /* This code disables the data cache. Don't execute this - * unless you're testing something. - */ - /* Allow NVRam to override DM Setup */ - //if (getnvram( TOKEN_CACHE_DM_MODE) != 1) { - { - msrnum = CPU_DM_CONFIG0; - msr = rdmsr(msrnum); - msr.lo |= DM_CONFIG0_LOWER_DCDIS_SET; - wrmsr(msrnum, msr); - } - /* This code disables the instruction cache. Don't execute - * this unless you're testing something. - */ - /* Allow NVRam to override IM Setup */ - //if (getnvram( TOKEN_CACHE_IM_MODE) ==1) { - { - msrnum = CPU_IM_CONFIG; - msr = rdmsr(msrnum); - msr.lo |= IM_CONFIG_LOWER_ICD_SET; - wrmsr(msrnum, msr); - } -#endif } |