summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authorPatrick Georgi <patrick@georgi-clan.de>2015-03-05 20:18:21 +0100
committerPatrick Georgi <pgeorgi@google.com>2015-03-06 22:30:13 +0100
commita425b960914003ece27612233929b1be2fc2c15a (patch)
tree9a048db6a33e355803ac73a887f91b6ab0eebd93 /src/cpu
parente236204d537808180ace7b78c1dc293ed59d9878 (diff)
downloadcoreboot-a425b960914003ece27612233929b1be2fc2c15a.tar.xz
AMD Fam10h: Only create _PR scope if it is filled in
The former pstates_algorithm() function has two early exit points now, and so it might never get around to writing pstates data. Change-Id: I19ca937375c6d33b78bd5b1859fa5c25473be9b6 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/8610 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/model_10xxx/fidvid.c2
-rw-r--r--src/cpu/amd/model_10xxx/powernow_acpi.c13
2 files changed, 5 insertions, 10 deletions
diff --git a/src/cpu/amd/model_10xxx/fidvid.c b/src/cpu/amd/model_10xxx/fidvid.c
index a3f3075dd8..798d538a53 100644
--- a/src/cpu/amd/model_10xxx/fidvid.c
+++ b/src/cpu/amd/model_10xxx/fidvid.c
@@ -79,7 +79,7 @@ Fam10 Bios and Kernel Development Guide #31116, rev 3.48, April 22, 2010
11.- finalPstateChange() from init_fidvid_Stage2 (BKDG says just "may", anyway)
12.- generate ACPI for p-states.
- generated in powernow_acpi.c pstates_algorithm()
+ generated in powernow_acpi.c amd_generate_powernow()
"must also be completed"
diff --git a/src/cpu/amd/model_10xxx/powernow_acpi.c b/src/cpu/amd/model_10xxx/powernow_acpi.c
index 09726a0cda..bf97099cf2 100644
--- a/src/cpu/amd/model_10xxx/powernow_acpi.c
+++ b/src/cpu/amd/model_10xxx/powernow_acpi.c
@@ -79,7 +79,7 @@ static void write_pstates_for_core(u8 pstate_num, u16 *pstate_feq, u32 *pstate_p
* processor combination is installed. If it does break please fix the
* code in the proper locations!
*/
-static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
+void amd_generate_powernow(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
{
u8 processor_brand[49];
u32 *v;
@@ -260,17 +260,12 @@ static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
Pstate_latency[index]);
}
+ char pscope[] = "\\_PR";
+
+ acpigen_write_scope(pscope);
for (index = 0; index < cmp_cap; index++)
write_pstates_for_core(Pstate_num, Pstate_feq, Pstate_power,
Pstate_latency, Pstate_control, Pstate_status,
index, pcontrol_blk, plen, onlyBSP);
-}
-
-void amd_generate_powernow(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
-{
- char pscope[] = "\\_PR";
-
- acpigen_write_scope(pscope);
- pstates_algorithm(pcontrol_blk, plen, onlyBSP);
acpigen_pop_len();
}