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author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-17 03:14:54 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-17 03:14:54 +0000 |
commit | bd112980ffcc7d9809dff88b7208e804c54345ab (patch) | |
tree | 7385b2ec5f30275205a31c674620e1cb013e9265 /src/cpu | |
parent | b319b1778c0546d9fc0777ccb9a0b82291b5a60e (diff) | |
download | coreboot-bd112980ffcc7d9809dff88b7208e804c54345ab.tar.xz |
more warning fixes.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5242 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/intel/socket_PGA370/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_PGA370/Kconfig b/src/cpu/intel/socket_PGA370/Kconfig index cd3ecd0107..d7e8eb704b 100644 --- a/src/cpu/intel/socket_PGA370/Kconfig +++ b/src/cpu/intel/socket_PGA370/Kconfig @@ -22,3 +22,10 @@ config CPU_INTEL_SOCKET_PGA370 bool select MMX select UDELAY_TSC + +# Not all CPUs for Socket 370 can do SSE2 +config SSE2 + bool + default n + depends on CPU_INTEL_SOCKET_PGA370 + |