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authorDavid Hendricks <dhendrix@chromium.org>2013-02-09 17:24:17 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-02-10 04:03:28 +0100
commit0b153bdda97fad6033a1d5aea58af1dd9df6125d (patch)
treeb5e418413f1da245aca41e4868217516d114d653 /src/cpu
parent0f7b400f2e3497cf37758f4b14040930bea22391 (diff)
downloadcoreboot-0b153bdda97fad6033a1d5aea58af1dd9df6125d.tar.xz
exynos/snow: move SPI GPIO setup to mainboard bootblock code
This moves GPIO setup from chip-specific SPI code to mainboard- specific bootblock code. This makes exynos_spi_open a bit more generic so it can eventually be used for any SPI channel. This also benefits CBFS since the user can set media->context to to any set of SPI registers. Change-Id: I2bcb9de370df0a79353c14b4d021b471ddebfacd Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2347 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/samsung/exynos5-common/spi.c11
1 files changed, 1 insertions, 10 deletions
diff --git a/src/cpu/samsung/exynos5-common/spi.c b/src/cpu/samsung/exynos5-common/spi.c
index 0e5d5e51f3..81927370e6 100644
--- a/src/cpu/samsung/exynos5-common/spi.c
+++ b/src/cpu/samsung/exynos5-common/spi.c
@@ -81,20 +81,11 @@ static void exynos_spi_rx_tx(struct exynos_spi *regs, int todo,
}
}
+/* set up SPI channel */
int exynos_spi_open(struct exynos_spi *regs)
{
/* set the spi1 GPIO */
- // TODO Some of these should be done in board's bootblock file.
- // We should fix-up the mainboard-specific vs. exynos-specific parts in a
- // follow-up CL.
-
-// exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE);
- gpio_cfg_pin(GPIO_A24, 0x2);
- gpio_cfg_pin(GPIO_A25, 0x2);
- gpio_cfg_pin(GPIO_A26, 0x2);
- gpio_cfg_pin(GPIO_A27, 0x2);
-
/* set pktcnt and enable it */
writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt);
/* set FB_CLK_SEL */